In the semiconductor fabrication industry, it is a common goal to make an integrated circuit progressively smaller, faster, and more efficient. However as the basic circuit devices, such as transistors, get smaller, the reduced device dimensions cause otherwise tolerable electrical effects to become unacceptably large. One such undesirable effect is the difficulty of the gate of the transistor to precisely control current flow through the body terminal (i.e, the channel region) of the transistor. More specifically, as shown in FIG. 1A, as a transistor's dimensions grow smaller source/drain regions 10 become very close. The channel distance (d) is very small and consequently excessive current tends to leak from source/drain regions 10 outside the control of the gate electrode 12. Additionally, the ever increasing encroachment of the source/drain regions 10 underneath the gate electrode 12 tends to cause additional capacitance leading to other undesirable short channel effects.
Some devices have been formed in an attempt to correct undesirable short channel effects. One such device is the tri-gate device. A tri-gate device, as shown at FIG. 1B, includes source/drain regions 20, on an insulator layer 22 overlying a substrate 24. A gate electrode 26 is formed to surround a portion of the source/drain regions 20 defining an internal channel region 50 within the device connecting. A cross-section of this channel region 50 is shown at FIG. 1C, along the gate width of the device. As shown in FIG. 1C, the channel region 50 has three planar walls (61, 62, and 63) that are connected to the gate electrode 26 via a gate dielectric 65. Two of the walls 61 and 62 are vertical while one wall 63 is horizontal. Each of the three planar walls 61, 62 and 63 is termed a “gate”, G1, G2, and G30 respectively, since the gate electrode 26 makes electrical connection to each, and, thus, can provide a voltage to each side. It was believed that the three gates allowed a full depletion of the device. The tri-gate device is advantageous for several reasons. For example, because of its three-gate design, the gate electrode 26 can control the channel region with more precision. Additionally, because of its nature as a semiconductor-on-insulator device, capacitances are lower at source/drain regions 20, thus improving the device switching speed.
However, despite these advantages, technology continues to progress and transistor designs continue to shrink. Consequently, even the tri-gate design begins to face challenges in controlling current in the channel region, and other short channel effects.